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DSPIC33EP512GP502-H/SP MICROCHIP TECHNOLOGY
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Category: 16-bit dsPIC family
Description: IC: dsPIC microcontroller; SRAM: 48kB; Memory: 512kB; DIP28; DSPIC
Type of integrated circuit: dsPIC microcontroller
SRAM memory capacity: 48kB
Program memory: 512kB
Case: DIP28
Number of inputs/outputs: 21
Number of 16bit timers: 5
Mounting: THT
Interface: ADC; ECAN; I2C x2; IrDA; JTAG; LIN; PPS; SMBus; SPI x2; UART x2
Kind of architecture: Harvard 16bit
Family: DSPIC
Number of 32bit timers: 2
Terminal pitch: 2.54mm
Number of cores: 1
Integrated circuit features: Brown Out Reset (BOR); CRC; DMA; PoR; watchdog
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Технічний опис DSPIC33EP512GP502-H/SP MICROCHIP TECHNOLOGY
Category: 16-bit dsPIC family, Description: IC: dsPIC microcontroller; SRAM: 48kB; Memory: 512kB; DIP28; DSPIC, Type of integrated circuit: dsPIC microcontroller, SRAM memory capacity: 48kB, Program memory: 512kB, Case: DIP28, Number of inputs/outputs: 21, Number of 16bit timers: 5, Mounting: THT, Interface: ADC; ECAN; I2C x2; IrDA; JTAG; LIN; PPS; SMBus; SPI x2; UART x2, Kind of architecture: Harvard 16bit, Family: DSPIC, Number of 32bit timers: 2, Terminal pitch: 2.54mm, Number of cores: 1, Integrated circuit features: Brown Out Reset (BOR); CRC; DMA; PoR; watchdog.
Інші пропозиції DSPIC33EP512GP502-H/SP
Фото | Назва | Виробник | Інформація |
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DSPIC33EP512GP502-H/SP | Виробник : Microchip Technology |
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товар відсутній |
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DSPIC33EP512GP502-H/SP | Виробник : Microchip Technology |
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товар відсутній |
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DSPIC33EP512GP502-H/SP | Виробник : MICROCHIP TECHNOLOGY |
![]() Description: IC: dsPIC microcontroller; SRAM: 48kB; Memory: 512kB; DIP28; DSPIC Type of integrated circuit: dsPIC microcontroller SRAM memory capacity: 48kB Program memory: 512kB Case: DIP28 Number of inputs/outputs: 21 Number of 16bit timers: 5 Mounting: THT Interface: ADC; ECAN; I2C x2; IrDA; JTAG; LIN; PPS; SMBus; SPI x2; UART x2 Kind of architecture: Harvard 16bit Family: DSPIC Number of 32bit timers: 2 Terminal pitch: 2.54mm Number of cores: 1 Integrated circuit features: Brown Out Reset (BOR); CRC; DMA; PoR; watchdog |
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