Технічний опис CD54HCT112F3A TI
Description: HIGH SPEED CMOS LOGIC DUAL J-K F, Packaging: Tube, Package / Case: 16-CDIP (0.300", 7.62mm), Output Type: Complementary, Mounting Type: Through Hole, Number of Elements: 2, Function: Set(Preset) and Reset, Type: JK Type, Operating Temperature: -55°C ~ 125°C (TA), Voltage - Supply: 4.5V ~ 5.5V, Current - Quiescent (Iq): 4 µA, Current - Output High, Low: 4mA, 4mA, Trigger Type: Negative Edge, Clock Frequency: 60 MHz, Input Capacitance: 10 pF, Supplier Device Package: 16-CDIP, Max Propagation Delay @ V, Max CL: 35ns @ 4.5V, 50pF, Number of Bits per Element: 1.
Інші пропозиції CD54HCT112F3A
| Фото | Назва | Виробник | Інформація |
Доступність |
Ціна без ПДВ |
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| CD54HCT112F3A | Виробник : HAR/TI |
 CDIP |
на замовлення 800 шт: термін постачання 14-28 дні (днів) |
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CD54HCT112F3A | Виробник : Texas Instruments |
Flip Flop JK-Type Neg-Edge 2-Element 16-Pin CDIP Tube |
товар відсутній |
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CD54HCT112F3A | Виробник : Texas Instruments |
Description: HIGH SPEED CMOS LOGIC DUAL J-K F Packaging: Tube Package / Case: 16-CDIP (0.300", 7.62mm) Output Type: Complementary Mounting Type: Through Hole Number of Elements: 2 Function: Set(Preset) and Reset Type: JK Type Operating Temperature: -55°C ~ 125°C (TA) Voltage - Supply: 4.5V ~ 5.5V Current - Quiescent (Iq): 4 µA Current - Output High, Low: 4mA, 4mA Trigger Type: Negative Edge Clock Frequency: 60 MHz Input Capacitance: 10 pF Supplier Device Package: 16-CDIP Max Propagation Delay @ V, Max CL: 35ns @ 4.5V, 50pF Number of Bits per Element: 1 |
товар відсутній |